p-channel 30-v (d-s) mosfet v ds (v) i d (a) -41 -31 symbol limit units v ds -30 v gs 25 continuous drain current a t a =25c i d -41 i dm -150 i s -45 a power dissipation a t a =25c p d 50 w t j , t stg -55 to 150 c symbol maximum units r ja 40 r jc 3 notes a. surface mounted on 1 x 1 fr4 board. b. pulse width limited by maximum junction temperature pulsed drain current b continuous source current (diode conduction) a thermal resistance ratings c/w parameter operating junction and storage temperature range absolute maximum ratings (t a = 25c unless otherwise noted) v parameter drain-source voltage a product summary -30 r ds(on) (m) 20 @ v gs = -10v 35 @ v gs = -4.5v maximum junction-to-ambient a maximum junction-to-case gate-source voltage key features: ? low r ds(on) trench technology ? low thermal impedance ? fast switching speed typical applications: ? white led boost converters ? automotive systems ? industrial dc/dc conversion circuits 1 freescale aou417/ MCU417 www.freescale.net.cn
parameter symbol test conditions min typ max unit gate-source threshold voltage v gs(th) v ds = v gs , i d = -250 ua -1 v gate-body leakage i gss v ds = 0 v, v gs = 20 v 100 na v ds = -24 v, v gs = 0 v -1 v ds = -24 v, v gs = 0 v, t j = 55c -25 on-state drain current i d(on) v ds = -5 v, v gs = -10 v -75 a v gs = -10 v, i d = -20 a 20 v gs = -4.5 v, i d = -15 a 35 forward transconductance g fs v ds = -15 v, i d = -20 a 28 s diode forward voltage v sd i s = -22.5 a, v gs = 0 v -0.98 v total gate charge q g 31 gate-source charge q gs 8.5 gate-drain charge q gd 14 turn-on delay time t d(on) 7 rise time t r 9 turn-off delay time t d(off) 85 fall time t f 40 input capacitance c iss 1934 output capacitance c oss 408 reverse transfer capacitance c rss 226 notes a. pulse test: pw <= 300us duty cycle <= 2%. b. guaranteed by design, not subject to production testing. dynamic ns zero gate voltage drain current static ua electrical characteristics i dss m r ds(on) nc v ds = -15 v, r l = 0.8 , i d = -20 a, v gen = -10 v, r gen = 6 v ds = -15 v, v gs = -4.5 v, i d = -20 a drain-source on-resistance pf v ds = -15 v, v gs = 0 v, f = 1 mhz 2 freescale is an equal opportunity/affirmative action employer. with such unintended or unauthorized use, even if such claim alleges that freescale was negligent regarding the design or manufacture of the part. buyer shall indemnify and hold freescale and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, where personal injury or death may occur. should buyer purchase or use freescale products for any such unintended or unauthorized application, products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other customer application by customers technical experts. freescale does not convey any license under its patent rights nor the rights of others. freescale consequential or incidental damages. typical parameters which may be provided in freescale data sheets and/or specifications can and do vary or guarantee regarding the suitability of its products for any particular purpose, nor does freescale assume any liability arising out freescale reserves the right to make changes without further notice to any products herein. freescale makes no warranty, representation of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated in different applications and actual performance may vary over time. all operating parameters, including typicals must be validated for each applications intended to support or sustain life, or for any other application in which the failure of the freescale product could create a situation freescale aou417/ MCU417 www.freescale.net.cn
1. on-resistance vs. drain current 2. transfer characteristics 3. on-resistance vs. gate-to-source voltage 4. drain-to-source forward voltage 5. output characteristics 6. capacitance typical electrical characteristics 0 0.012 0.024 0.036 0.048 0.06 0 10 20 30 40 50 rds(on) - on - resistance( ) id - drain current (a) 3.5v 4.5v 10v,8v,6v 3v 4v 0 10 20 30 40 50 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 id - drain current (a) vds - drain - to - source voltage (v) 10v,8v,6v 3.0v 3.5v 4.5 4v 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0 2 4 6 8 10 rds(on) - on - resistance( ) vgs - gate - to - source voltage (v) tj = 25 c tj = 25 c 0 10 20 30 40 50 0 1 2 3 4 5 id - drain current (a) vgs - gate - to - source voltage (v) tj = 25 c 0.01 0.1 1 10 100 0.2 0.4 0.6 0.8 1 1.2 1.4 is - source current (a) vsd - source - to - drain voltage (v) tj = 25 c 0 500 1000 1500 2000 2500 3000 3500 0 5 10 15 20 capacitance (pf) vds - drain - to - source voltage (v) ciss coss crss f = 1mhz i d = - 20a 3 freescale aou417/ MCU417 www.freescale.net.cn
7. gate charge 9. safe operating area 10. single pulse maximum power dissipation 8. normalized on-resistance vs junction temperature 11. normalized thermal transient junction to ambient typical electrical characteristics 0 1 2 3 4 5 6 7 8 9 10 0 14 28 42 56 70 vgs - gate - to - source voltage (v) qg - total gate charge (nc) 0.01 0.1 1 10 100 1000 0.1 1 10 100 1000 id current (a) vds drain to source voltage (v) 10 us 100 us 1 ms 10 ms 100 ms 1 sec 10 sec 100 sec dc idm limit limited by rds 1 0 20 40 60 80 100 120 0.001 0.01 0.1 1 10 100 1000 peak transient power (w) t1 time (sec) 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t1 time (sec) d = 0.5 0.2 0.1 0.05 0.02 single pulse r ja (t) = r(t) + r ja t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 0.5 1 1.5 2 -50 -25 0 25 50 75 100 125 150 rds(on) - on - resistance( ) (normalized) tj - junctiontemperature( c) p(pk) t 1 t 2 r ja = 40 c / w v ds = - 15v i d = - 20a 4 freescale aou417/ MCU417 www.freescale.net.cn
package information note: 1. all dimension are in mm. 2. package body sizes exclude mold flash, protrusion or gate burrs. mold flash, protrusion or gate burrs shall not exceed 0.10 mm per side. 3. package body sizes determined at the outermost extremes of the plastic body exclusive of mold flash, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 5 freescale aou417/ MCU417 www.freescale.net.cn
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